Recently, the Minister of State for Electronics and Information Technology launched the Digital India RISC-V Microprocessor (DIR-V) Program.
Context
Recently, the Minister of State for Electronics and Information Technology launched the Digital India RISC-V Microprocessor (DIR-V) Program.
About Digital India RISC-V Microprocessor (DIR-V) Program
- The Digital India RISC-V programme aims to enable the creation of microprocessors for the future in India, for the world and achieve industry-grade silicon and design wins.
- The government of India set the timeline for starting the commercial manufacturing of the indigenous microprocessors by December 2023.
- The government has set a timeline to commercially roll out the first indigenous chipsets by 2023-24 and future generation of microprocessors under the programme to meet the surging demand in semiconductors in the automotive, mobility and computing segments.
RISC-V
- RISC-V is an open and free ISA that will enable a new era of processor innovation through collaboration.
- This initiative is in line with the government’s ambition toward Atmanirbhar Bharat.
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Features
- It will consolidate and leverage the ongoing efforts in the country with an integrated multi-institutional and multi-location team.
- It will finalise the formal architecture and target performance of chipsets, support original equipment makers and design wins in India and abroad.
- It is part of the government's Rs 76,000 crore effort to build a semiconductor ecosystem in the country.
- It will see partnerships between Startups, Academia and Multinationals, to make India not only a RISC-V Talent Hub for the World but also supplier of RISC-V System on Chips for Servers, Mobile devices, Automotive and Microcontrollers across the globe.
- It will catalyse the design innovation in the country and will encourage the several domestic startups working in RISC-V domains like- micro architecture design, verification and security aspects.
Indigenous Microprocessor
- Shakti Microprocessor
- The Indian Institute of Technology (IIT) Madras has released the software development kit (SDK) for its open-source Shakti processor.
- It was designed, developed and booted by IIT Madras with a microchip fabricated in ISRO’s Semi-Conductor Laboratory at Chandigarh.
- The RISE group at IIT Madras started working on the Shakti project in 2016.
- Shakti is based on the open-source RISC-V instruction set architecture .
- The plan was to release a family of six classes of processors, each serving a different market.
- The group promised that the reference processors will be competitive with commercial offerings in terms of area, performance and power consumption.
- Vega processor
- C-DAC has successfully completed the design, development and validation of a series of 32-bit /64-bit Single and Multi-core high performance processors named ‘VEGA’.
- It is based on the open source RISC-V Instruction Set Architecture (ISA) with Multi Level Caches.
- C-DAC has also integrated a wide range of in-house developed Silicon proven System and Peripheral IPs.
- The complete software ecosystem comprising the Board Support Packages ,IDE plug-ins and Debugger for development, testing and debugging is also available.
